Shinji Sato

Shinji Sato

Biography

1981 Graduated from Department of Physics, The University of Tokyo
1981 Joined Fujitsu Limited
1982 Moved to Fujitsu Laboratory Limited
2000 Joined MicroArk Co., Ltd.
2003 Joined ECSEC Laboratory
2014 Joined Information-technology Promotion Agency, Japan (IPA)
2010 - 2022年 Attended JHAS meeting as a liaison from IC System Security Japan Consortium (ICSS-JC)
2023 retired from IPA

Currently, he is an Invited Researcher in the Security Assurance Scheme Research Team, Cyber Physical Security Research Institute (CPSEC), National Institute of Advanced Industrial Science and Technology (AIST)
He specializes in IT security evaluation and certification of smartcards and related devices.

Selected Publications

• Takahashi, Sato et al.: "A 240K Transistor CMOS Array with Flexible Allocation of Memory and Channels", 1985 IEEE International Solid-State Circuits Conference (an d also IEEE Journal of Solid-State Circuits, vol. sc-20, No.5, October 1985)
• Shinji Sato et al. : "On-Chip Testing for 30K-Gate Masterslice", 1986 IEEE Custom Integrated Circuits Conference
• Yachyang Sun, Sato et al. : "A Channel Router for Single Layer Customization Technology", 1991 IEEE International Conference on Computer-Aided Design
• Shinji Sato : "Simulated Quenching: A New Placement Method for Module Generation", 1997 IEEE International Conference on Computer-Aided Design
• Takashima, Sato et al. : "Two-Dimensional Placement Method Based on Divide-And-Replacement", 2002 Asia Pasific Conference on Circuits and Systems