Yohei Hori

Yohei Hori

Biography

1999　B. E. Department of Engineering Systems, Third Cluster, University of Tsukuba, Japan.
2001　M. E. Doctoral Program in Functioning Systems, Graduate School of Engineering, University of Tsukuba, Japan.
2004　Ph.D. Doctoral Program in Functioning Systems, Graduate School of Engineering, University of Tsukuba, Japan.
2004　Post-doctoral researcher at Information Processing Research Institute, National Institute of Advanced Industrial Science and Technology (AIST), Japan.
2008　Research scientist/Assistant professor at Research and Development Initiative, Chuo University, Japan.
2010　Research scientist at Research Center for Information Security (RCIS), National Institute of Advanced Industrial Science and Technology (AIST), Japan.
2012　Researcher at Research Institute for Secure Systems (RISEC), National Institute of Advanced Industrial Science and Technology (AIST), Japan.
2015　Senior Researcher at Nanoelectronics Research Institute (NeRI), National Institute of Advanced Industrial Science and Technology (AIST), Japan.
2020　Senior Researcher at Device Technology Research Institute (D-Tech), National Institute of Advanced Industrial Science and Technology (AIST), Japan.
2018　Concurrently work for Cyber Physical Security Research Institute (CPSEC), National Institute of Advanced Industrial Science and Technology (AIST), Japan.
2021　(Concurrently work for) AI Chip Design Open Innovation Laboratory (AIDL), National Institute of Advanced Industrial Science and Technology (AIST), Japan.

Area of expertise: FPGA systems and hardware security

Papers（Selective）

• Yohei Hori, Toshihiro Katashita, Hirofumi Sakane, Kenji Toda and Akashi Satoh, “Bitstream Protection in Dynamic Partial Reconfiguration Systems Using Authenticated Encryption,” IEICE Trans. Information and Systems, Vol.E96-D, No.11, pp.2333-2343, 2013.
• Yohei Hori, Toshihiro Katashita, Hyunho Kang, Akashi Satoh, Shinichi Kawamura, and Kazukuni Kobara, “Evaluation of Physical Unclonable Functions for 28-nm Process Field-Programmable Gate Arrays,” Journal of Information Processing, Vol.22, No.2, pp.344-356, 2014.
• Kazunori Kuribara, Yohei Hori, Toshihiro Katashita, Kazuaki Kakita, Yasuhiro Tanaka, Manabu Yoshida, “Organic physically unclonable function on flexible substrate operable at 2 V for IoT/IoE security applications,” Organic Electronics, Vol.51, pp.137-141, 2017.
• Yasuhiro Ogasahara, Yohei Hori, Toshihiro Katashita, Tomoki Iizuka, Hiromitsu Awano, Makoto Ikeda, “Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge–Response pair acquisition using Built-In Self-Test before shipping,” Integration-The VLSI Journal, Elsevier Sciecne BV., Vol.71, pp.144-153, 2020.
• Yusuke Yano, Kengo Iokibe, Toshiaki Teshima, Yoshitaka Toyota, Toshihiro Katashita, Yohei Hori, “Evaluation of Side-Channel Leakage Simulation by Using EMC Macro-Model of Cryptographic Devices,” IEICE Transactions on Communications, Vol. E104.B, No. 2, pp.178-186, 2021.

Website

• Yohei Hori’s Web Site : https://staff.aist.go.jp/hori.y/index_j.html
• ORCID : https://orcid.org/0000-0003-0099-6090
• Publons : https://publons.com/researcher/2199659/yohei-hori/

Awards

• Excellent Demo! Award, IEEE GCCE 2017, 2017
• JIP Specially Selected Paper, IPSJ Journal of Information Processing (JIP), 2014
• Outstanding Paper Award, ICACT2014, 2014
• Outstanding Poster Award, IEEE GCCE2013, 2013
• Excellent Paper Award, IEEE GCCE2012, 2012
• Excellent Paper Award, DICOMO2012, 2012
• Excellent Presentation Award, DICOMO2012
• Design Gaia Poster Award, Design Gaia 2008